Intel · Xeon 5500 · 2009 · LGA1366
The Intel Xeon W5580 is a server processor with 4 cores, released in 2009. It is part of the Xeon 5500 lineup, using the Xeon 5500 platform, and fits the LGA1366 socket. Internally, it is built on the "Gainestown" architecture. Thanks to Intel Hyper-Threading, each core can handle two instruction streams simultaneously, yielding a total of 8 threads for improved parallelism. The Xeon W5580 has a base clock of 3.2 GHz and can boost up to 3.466 GHz depending on workload and thermal headroom. Intel manufactures the "Gainestown" silicon on a 45nm process node. This processor supports DDR3 memory across 3 channels, up to 144GB total, with ECC support standard for data integrity in server workloads. It supports both single-socket (1P) and dual-socket (2P) configurations, with 36 lanes of PCIe 2.0 available for storage, networking and accelerators. With a TDP of 130W, the Xeon W5580 sits in a typical power envelope for a modern desktop CPU. The cache hierarchy consists of no dedicated of L1, no dedicated of L2, and 8MB of L3 cache.
Xeon 5500 series — the first Nehalem-based Xeon, introducing an integrated memory controller and QuickPath Interconnect.
| Brand | Intel |
|---|---|
| Family | Xeon 5500 |
| Series | Xeon 5500 |
| Architecture | Gainestown |
| Codename | Gainestown |
| Launch year | 2009 |
| Cores | 4 |
| Threads | 8 |
| Base clock | 3.2 GHz |
| Boost clock | 3.466 GHz |
| L3 cache | 8MB |
| TDP | 130W |
| Socket | LGA1366 |
| Process | 45nm |
| Memory type | DDR3 |
| Memory channels | 3 |
| Max memory | 144GB |
| PCIe lanes | 36 (PCIe 2.0) |
| ECC memory | Yes |
| Socket scalability | 1P and 2P |
| Part number | AT80602000756AD |